This invention is directed to a hermetic package for the protecting, housing, cooling and interconnecting of an integrated circuit chip. The package is made of a plurality of ceramic layers each of which carries a particular electrically conductive pattern and which has interior openings therein so as to provide recesses in which the chip and discrete components can be located and connected. The package may include locations for discrete components such as resistors and capacitors. In computer and in similar circuits, the actual processing of information is done entirely by the circuitry on the microelectronic chips, and this suggests that the functions of packaging are simply to protect the chips, interconnect them with other devices, and to distribute electric power. However, in many high-speed data processing units, packaging configuration is an important factor which determines or limits performance, cost and reliability. One reason packaging has become so important is the imperative to make the central elementary computing system exceedingly compact. Improvements in the design and fabrication of microelectronic devices have greatly increased the number of logic functions that can be placed on a single chip as well as the speed at which logic functions are performed. As a result, a major source of delay in the central processing unit of many computers is the time required for a signal to pass between chips. In order to reduce this delay, the chips must be placed close together. Putting many chips into a small volume challenges packaging technology in several ways. There is little space available for the many conductors required to distribute power and information bearing signals on the chips. In addition, the properties of this network of conductors must be such as to minimize the distortion of signals.
An integrated circuit chip with many functions leads to a chip of large size an with many connections. Such normally requires a larger chip package, both to physically accommodate the chip and to provide the necessary external connection pads. However, in a complicated circuit, there are many such chips mounted on and connected to a printed wiring board. Utilization of a minimum amount of board space becomes important both to maximize the number of chips and thus the number of functions mountable on the board and also to minimize the connection lengths. Packages must be provided to fit a minimum space and to maximize internal chip size capacity.
Furthermore, such a dense array of chips gives off sufficient heat that cooling is an important consideration. Signal delays occur because of finite length of lines interconnecting chips as well as lines interconnecting capacitive, resistive or inductive circuit discrete devices with a portion of the circuit. Signal delays are increased when such interconnecting lines are made outside of the package. Extended leads of this nature reduce circuit response time. Another important feature of a package into which a circuit chip is to be inserted is the interconnection between the chip and the package. It must be convenient within the package so that accurate interconnection can be made. Furthermore, the connections on the exterior of the package must also be located in such a manner that the package can be appropriately interconnected into the remainder of the circuit. Accordingly, there is need for a microelectronic package which satisfies the diverse requirements of the electronic system in which its contained chip will be employed.